編號 | 發明人 | 專利名稱(中文) | 專利名稱(英文) | 專利國別 | 領證年度 |
---|---|---|---|---|---|
1 | Kuan-Liang Liu, Sheng-Chau Chen, Chung-Liang Cheng, Chia-Shiung Tsai, Yeong-Jyh Lin, Pinyen Lin, Huang-Lin Chao | Embedded Backside Memory on a Field Effect Transistor | US11925033B2 | 2024 | |
2 | Lin Yeong-Jyh, Li Ching I, Chiou De-Yang, Chen Sz-Fan, Hu Han-Jui, Wang Ching-Hung, Lee Ru-Liang, Yu Chung-Yi | Photolithography Alignment Process for Bonded Wafers | US20240186258A1 | 2024 | |
3 | Huang Xin-Hua, Yu Chung-Yi, Lin Yeong-Jyh, Chu, Rei-Lin | 3D trench capacitor for integrated passive devices | US20240088103A1 | 2024 | |
4 | Wang, Ching-Hung, Lin Yeong-Jyh, Ching I Li, Tzu-Wei Yu, Chung-Yi Yu | Mechanical Wafer Alignment Detection for Bonding Process | US11688717-B2 | 2023 | |
5 | Wang, Ching-Hung, Liu Ping-Yin, Lin Yeong-Jyh, Tu Yeur-Luen | Method for alignment, process tool and method for wafer-level alignment | US11189515B2 | 2021 | |
6 | Liu Ping-Yin, Lin Yeong-Jyh, Chen Chi-Ming | Semiconductor structure and associated manufacturing method | US11127725B2 | 2021 | |
7 | Bor-Ping Jang, Yeong-Jyh Lin, Chien Ling Hwang, Chung-Shi Liu | Wafer-Level Underfill and Over-Molding |
US11024618B2 US09893044B2 US08951037B2 |
2021 | |
8 | Hwang Chien Ling, Jang Bor-Ping, Liao Jen-Chun, Lin Yeong-Jyh, Liang Hsiao-Chung, Liu Chung-Shi | Methods for controlling warpage in packaging |
US10985135B2 US10510712B2 US10157881B2 US09484226B2 US09093337B2 |
2021 2020 2019 2018 |
|
9 | Hwang Chien Ling, Lin Yeong-Jyh, Jang Bor-Ping, Liang Hsiao-Chung | Semiconductor device having a boundary structure, a package on package structure, and a method of making |
US10804234B2 US10276531B2 US09659891B2 |
2020 2019 |
|
10 | Jang Bor-Ping, Hwang Chien Ling, Liao Hsin-Hung, Lin Yeong-Jyh | Semiconductor wafer device and manufacturing method thereof |
US10770331B2 US20180358255 |
2020 2018 |
|
11 | Yu Chen-Hua, Hwang Chien Ling, Lin Yeong-Jyh | Packaging through pre-formed metal pins |
US10734345B2 US09929118B2 US09418953B2 |
2020 | |
12 | Wang Ching-Hung, Liu Ping-Yin, Lin Yeong-Jyh, Tu Yeur-Luen | Method for alignment, process tool and method for wafer-level alignment | US20200227298A1 | 2021 | |
13 | Lin Yeong-Jyh, Tu Yeur-Luen, Liang Chin-Wei | Apparatus and method for wafer bonding | US20220285156A1 | 2022 | |
14 | Liu Ping-Yin, Lin Yeong-Jyh, Chen Chi-Ming | Stacked LED structure and associated manufacturing method | US10622342B2 | 2020 | |
15 | Jang Bor-Ping, Lin,Yeong-Jyh, Hwang Chien Ling, Liu Chung-Shi, Chen Meng-Tse, Cheng Ming-Da, Yu Chen-Hua | Wafer level transfer molding and apparatus for performing the same |
US11390000B2 US20200114556A1 US10513070B2 |
2022 2020 2019 |
|
16 | Lin Yeong-Jyh, Liao Hsin-Hung, Hwang Chien Ling, Jang Bor-Ping, Liang Hsiao-Chung, Liu Chung-Shi | Mechanisms for forming bonding structures |
US11233032B2 US10504870B2 |
2022 2019 |
|
17 | Hwang Chien Ling, Lin Yeong-Jyh, Hsiao Yi-Li, Cheng Ming-Da, Tsai Tsai-Tsung, Liu Chung-Shi, Lii Mirng-Ji, Yu Chen-Hua | Methods for stud bump formation | US10147693B2 | 2018 | |
18 | Liu Ping-Yin, Lin Yeong-Jyh, Huang Xin-Hua, Tsai Chia-Shiung | Hybrid bonding system and cleaning method thereof | US09917069B2 | 2018 | |
19 | Liu Ping-Yin, Huang Xin-Hua, Lin Yeong-Jyh, Peng Jung-Huei | Structure and formation method of semiconductor device structure | US09834435B1 | 2017 | |
20 | Yu Chun Hui, Yee Kuo-Chung, Yu Chen-Hua, Lin Yeong-Jyh, Lin Chia-Hsiang, Yen Liang-Ju, Sheu Lawrence Chiang | Method of forming interconnects for three dimensional integrated circuit | US09583365B2 | 2017 | |
21 | Lin Yeong-Jyh, Liao Hsin-Hung, Hwang Chien Ling, Hsiao Yi-Li, Liu Chung-Shi, Lii Mirng-Ji, Yu Chen-Hua | Methods for forming apparatus for stud bump formation |
US09498851B2 US08936730B2 |
2016 2015 |
|
22 | Hwang Chien Ling, Lee Pei-Hsuan, Huang Ying-Jui, Lin Yeong-Jyh, Liu Chung-Shi | Chip packages and methods of manufacture thereof | US09425179B2 | 2016 | |
23 | Jang Bor-Ping, Hwang Chien Ling, Liao Hsin-Hung, Lin Yeong-Jyh | Semiconductor wafer device | US09236351B2 | 2016 | |
24 | Hwang Chien Ling, Lin Yeong-Jyh, Hsiao Yi-Li, Cheng Ming-Da, Tsai Tsai-Tsung, Liu Chung-Shi, Lii Mirng-Ji, Yu Chen-Hua | Apparatus for stud bump formation | US09021682B2 | 2015 | |
25 | Yeong-Jyh Lin, Hsin-Hung Liao, Chien Ling Hwang, Yi-Li Hsiao, Chung-Shi Liu, Mirng-Ji Lii, Chen-Hua Yu | Methods for stud bump formation and apparatus for performing the same | US8540136 B1 (US & KR) | 2013 | |
26 | Yu-Ren Chen, Yeong-Jyh Lin | Zigzag-stacked package structure | US07781878 B2 | 2010 | |
27 | 林勇志, 蘇育生 | 移動式腔體結構 | TW201145429A | 2011 | |
28 | 蘇育生, 林勇志 | 半導體設備及其中的可動式承載平板 | TW201128726A | 2011 | |
29 | 蘇育生, 林勇志 | 半導體設備及其中的閥室結構 | TW201128725A | 2011 | |
30 | 陳雅琪, 林勇志, 毛苡馨, 李明勳, 沈弘哲 | 防止薄膜變形之薄膜覆晶封裝基板 |
TW200836316A CN101290921A |
2008 | |
31 | 黃祥銘, 劉安鴻, 林勇志, 李宜璋, 何淑靜 | 多晶片面對面堆疊封裝構造 | TW200834844A | 2008 | |
32 | 黃祥銘, 劉安鴻, 李宜璋, 林勇志, 何淑靜 | 黃祥銘, 劉安鴻, 李宜璋, 林勇志, 何淑靜 |
TW200834085A CN101256201A |
2008 | |
33 | 陳雅琪, 林勇志, 毛苡馨 | 球格陣列封裝方法與封裝構造 | TW200832627A | 2008 | |
34 | 黃祥銘, 劉安鴻, 林勇志, 李宜璋 | 影像感測器之玻璃覆晶封裝構造 |
TW200807732A CN100481480C |
2009 | |
35 | 李宜璋, 劉安鴻, 黃祥銘, 林勇志, 呂良田 | 晶片尺寸影像感測封裝構造及其應用之模組 | TW200805588A | 2008 | |
36 | Huang Hsiang-Ming, Liu An-Hong, Lin Yeong-Jyh, and Lee Yi-Chang | COB Type IC Package for Improving Bonding of Bumps Embedded in Substrate and Method for Fabricating the Same |
US07642639B2 TWI311806B |
2009 | |
37 | Huang Hsiang-Ming, Liu An-Hong, Lin Yeong-Jyh, Lee Yi-Chang, Tu Wu-Chang, Lin Chun-Hung, and Chiu Shih Feng | High Frequent IC Package and Method for Fabricating the Same |
US07554197B2 TWI292949B CN100438008C |
2008 | |
38 | Huang. Hsiang-Ming, Liu An-Hong, Lin Yeong-Jyh, and Lee Yi-Chang | High Frequency IC Package | TWI295092B | 2008 |
編號 | 著作名稱 |
---|---|
1 | Yeong-Jyh Lin and Sheng-Jye Hwang, “Pick-up Process Analysis of a Die Bonder,” VDM Verlag Dr. Mueller, April 2008, (ISBN: 978-3639000344) |
2 | 林勇志, 黃朝瑜, 黃聖杰, “Pro/Engineer Wildfire:基礎入門(下), ”知城數位科技股份有限公司, Feb. 2004, Taipei, (ISBN: 9867489055) |
3 | 林勇志, 黃朝瑜, 黃聖杰, “Pro/Engineer Wildfire:基礎入門(上) , ”知城數位科技股份有限公司, Oct. 2003, Taipei, (ISBN:9867845854) |